1. Field of Invention
The present invention relates to transmission circuits and methods and in particular is related to transmission circuits and a manufacture method with dynamic paths for the same.
2. Description of Related Art
Computers have changed the world, and in the future, computers will increase their importance as the technology keeps advancing. Desktop versions as well as mobile phones utilize lots of technologies developed for computers. Apparently, more and more kinds of electronic devices will also share these technologies.
One important factor deciding the performance of computers is the architecture. The architecture includes the design of data flow. Even with a powerful processor, poorly designed data flow in a computer system still results in a poor performance.
FIG. 1 shows a conventional block diagram of a computer system. A CPU 101 is connected to an integrated circuit that includes a core logic circuit 102, a VGA circuit 103, and a DRAM controller 104. The DRAM controller 104 is further connected to a DRAM 105. Graphic data are firstly generated by the CPU 101 according to a running program. Then, these graphic data are sent to the core logic circuit 102. The core logic circuit 102 then dispatches these graphic data to the VGA circuit 103. After processed by the VGA circuit 103, proper data are transmitted to the DRAM controller 104, and are outputted to the DRAM 105 later.
The problem is that the signal line between the CPU 101 and the core logic circuit 102 often has larger bandwidth than the signal line between the core logic circuit 102 and the VGA circuit 103 does. In other words, the core logic circuit 102 needs several clock cycles to deliver data received in one cycle. Such design wastes time and results in poor performance.
Besides, not all data need be processed by the VGA circuit 103 before they are transmitted to the DRAM controller 104. However, these data still need to pass through the VGA circuit 103 and such design causes an unnecessary time delay. However, it is expensive to enlarge the bandwidth between the core logic 102 and the VGA circuit 103.